AI Security · Trustworthy AI · Hardware Security · Cryptography

Security Infrastructure for AI Society Laboratories

We conduct research on security foundations for a safe, trustworthy, and sustainable society in which humans and AI coexist.

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About Us

Security Infrastructure for AI Society Laboratories address emerging security challenges caused by the rapid deployment of AI systems, including generative AI, federated learning, edge AI, AI hardware, and post-quantum cryptography.

As AI becomes part of social infrastructure, society must address model theft, unauthorized learning, adversarial inputs, privacy leakage, side-channel attacks, and implementation vulnerabilities. Our laboratories study both “security for AI” and “AI for security” from software, hardware, and cryptographic perspectives.

AI Security Model verification, adversarial robustness, unauthorized learning prevention, and trustworthy AI.
Privacy & Learning Secure and fair federated learning platforms and efficient federated unlearning.
Hardware & Cryptography PUF authentication, lightweight cryptography, side-channel analysis, AI accelerators, and post-quantum cryptography.
AI Security Trustworthy AI AI Model Verification Federated Learning Fair Federated Learning Federated Unlearning Adversarial Machine Learning Side-Channel Attack Hardware Security PUF Lightweight Cryptography Energy Harvesting Batteryless IoT AI Accelerator Post-Quantum Cryptography

Research Areas

Our laboratories cover a broad range of security infrastructure technologies for AI society, from AI model protection to cryptographic hardware implementation.

1

AI Model Verification for Intellectual Property Protection

We study model ownership verification, watermarking, authenticity checking, and detection of model theft.

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2

Secure and Fair Federated Learning Platform

We develop platforms for privacy-preserving, fair, attack-resistant, and practical federated learning.

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3

Efficient Unlearning in Federated Learning

We investigate efficient methods for removing specific users or data from trained federated models.

4

Prevention of Unauthorized Learning by Generative AI

We study technologies to prevent and detect unauthorized use of data and content in generative AI training.

5

Adversarial Inputs and Countermeasures

We analyze adversarial examples, natural noise, physical-world attacks, backdoors, and data poisoning.

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6

Secure Authentication Using PUFs

We study PUF-based device authentication, hardware fingerprints, secure key generation, and IoT security.

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7

Deep-Learning-Based Side-Channel Analysis

We use deep learning to evaluate information leakage from cryptographic implementations and improve security.

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8

AI Accelerators

We study energy-efficient AI processors, FPGA-based acceleration, edge AI, and secure AI hardware.

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9

Implementation of Post-Quantum Cryptography

We study CRYSTALS-Kyber, IoT-oriented implementation, energy-harvesting devices, and side-channel resistance.

10

Lightweight Cryptography Security Modules for IoT Devices

We study security modules based on lightweight cryptography for resource-constrained IoT devices and embedded systems.

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11

Batteryless Secure IoT Modules Using Energy Harvesting

We develop secure IoT modules that operate without batteries by using energy harvesting technologies for sustainable deployment.

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Publications

Research outcomes from our laboratories are published in journals, international conferences, and domestic conferences. We have also successfully obtained numerous competitive research grants, including Grants-in-Aid for Scientific Research This section focuses on international conference publications.

2026 International Conference Publications
  1. T. Tojo, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Secure VAT-Based Semi-Supervised Federated Learning Method in Non-IID Environments,” Proc. of 2026 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 591–594, March 2026.
  2. T. Shibata, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Secure Implementations with Cryptographic Functions for Energy Harvesting Devices,” Proc. of 2026 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 515–518, March 2026.
  3. R. Murakami, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “AI Security Evaluation Platform for on-Device Learning,” Proc. of 2026 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 555–558, March 2026.
  4. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Evaluation of Malicious Circuit for Echo State Network,” Proc. of 2026 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 559–562, March 2026.
  5. H. Ogata, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Preliminary Study on Privacy-Preserving Person Identification with Obscured Facial Features,” Proc. of 2026 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 511–514, March 2026.
  6. Y. Niitsu, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Sliding Bounding-Box Based Digital Watermarking Method Against AI Model Extraction Attack,” Proc. of 2026 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 595–598, March 2026.
  7. S. Kato, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Torus Oriented Countermeasure Against Adversarial Examples and Its Evaluation,” Proc. of 2026 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 599–602, March 2026.
  8. C. Ishida, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Security Evaluation of Dataset-aware Cumulative Gradient Smash Poisoning Method in Split Federated Learning,” Proc. of the 31st International Symposium on Artificial Life and Robotics 2026, pp. 989–994, January 2026.
2025 International Conference Publications
  1. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Hamming Distance aware Fault Analysis for LTLBC,” Proc. of the 9th IEEE International Conference on Smart Internet of Things, pp. 286‒291, November 2025.
  2. R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Evaluation of Visual Adversarial Robustness on Multilingual Large Vision-Language Model,” Proc. of the 9th IEEE International Conference on Smart Internet of Things, pp. 362‒368, November 2025.
  3. T. Tojo, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Virtual Adversarial Training (VAT)-based Secure Federated Learning Platform: Design and Evaluation,” Proc. of the 12th International Conference on Intelligent Systems and Image Processing 2025, pp. 208–215, September 2025.
  4. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “An Improved Encryption Circuit with Embedded Counterfeit Detection and Security Evaluation,” Proc. of the 12th International Conference on Intelligent Systems and Image Processing 2025, pp. 216–222, September 2025.
  5. T. Tojo, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Parameter Free Countermeasure against Adversarial Examples,” Proc. of 2025 17th International Conference on Computer and Automation Engineering, pp. 44–47, March 2025.
  6. R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Quantization of Tiny MLP-Mixer and its Evaluation,” Proc. of 2025 17th International Conference on Computer and Automation Engineering, pp. 336–339, March 2025.
  7. K. Kanada, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Security Evaluation of Differentially Private Federated Learning against Model Inversion Attacks,” Proc. of 2025 17th International Conference on Computer and Automation Engineering, pp. 192–195, March 2025.
  8. C. Ishida, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Quantitative Evaluation of Vulnerabilities in Adversarial Shadow Attack,” Proc. of 2025 17th International Conference on Computer and Automation Engineering, pp. 34–37, March 2025.
  9. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Power based Side-Channel Analysis for Lightweight Cipher LTLBC,” Proc. of 2025 17th International Conference on Computer and Automation Engineering, pp. 380–384, March 2025.
2024 International Conference Publications
  1. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “SuperSonic Glitch Physical Unclonable Function for Encryption and Device Authentication,” Proc. of 2024 7th Artificial Intelligence and Cloud Computing Conference, pp. 486‒490, December 2024.
  2. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Adversarial Examples for Field Programmable Gate Array based AI Module,” Proc. of 2024 7th Artificial Intelligence and Cloud Computing Conference, pp. 361‒365, December 2024. Best Presentation Award
  3. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “FPGA Implementation of Low-Latency Cipher LTLBC and its Security Evaluation,” Proc. of 28th IEEE/ACIS International Winter Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, pp. 42‒45, December 2024.
  4. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Error Correction Method for Lightweight Cipher PRINCE based Physically Unclonable Function,” Proc. of 2024 6th International Conference on Information Technology and Computer Communications, pp. 38‒42, October 2024.Best Presentation Award
  5. R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Hue and Saturation oriented Imperceptible Adversarial Examples and their Evaluation,” Proc. of 2024 6th International Conference on Information Technology and Computer Communications, pp. 101‒106, October 2024.
  6. T. Tojo, R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Luminance Correction based Countermeasure against Adversarial Examples,” Proc. of 2024 6th International Conference on Information Technology and Computer Communications, pp. 114‒120, October 2024.
  7. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Hardware Security Evaluation Using Deep Learning Power Analysis for Low Latency Simon Family Ciphers,” Proc. of the 11th IIAE International Conference on Intelligent Systems and Image Processing 2024, pp. 107–110, September 2024.
  8. K. Kanada, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Vulnerability Evaluation of Model Inversion Attack for Nonlinear Regression Models and Imbalanced Data,” Proc. of the 11th IIAE International Conference on Intelligent Systems and Image Processing 2024, pp. 111–117, September 2024.
  9. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Countermeasure using Physically Unclonable Function for Hardware Trojans in Edge AI Devices,” Proc. of 2024 IEEE 10th International Conference on Applied System Innovation (IEEE ICASI 2024), pp. 1–3, April 2024.
2023 International Conference Publications
  1. Y. Nozaki, S. Takemoto, Y. Ikezaki, and M. Yoshikawa, “Security Evaluation of Glitch Based Authentication Function for Edge AI,” Proc. of IEEE 12th Global Conference on Consumer Electronics, pp. 790–791, October 2023.
  2. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Hamming Weight aware Fault Analysis for Lightweight Cryptography TWINE,” Proc. of 8th International Conference on Cloud Computing and Internet of Things, pp. 59–63, September 2023.
  3. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Educational Materials for IoT Aware Secure Industrial Robot,” Proc. of the 10th IIAE International Conference on Intelligent Systems and Image Processing 2023, pp. 18–21, September 2023.
  4. Y. Nozaki, S. Takemoto, and M. Yoshikawa, “Tamper Resistance Evaluation of Midori128 against Differential Power Analysis,” Proc. of 6th IEEE International Conference on Knowledge Innovation and Invention, pp. 157–160, August 2023.Best Conference Paper Award
  5. M. Sato, Y. Nozaki, and M. Yoshikawa, “Implementation and evaluation of the lightweight cipher SPARKLE,” Proc. of the 6th International Conference on Electronics, Communications and Control Engineering, pp. 105–108, March 2023.
  6. R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Explainable AI based Adversarial Examples and its Evaluation,” Proc. of the 6th International Conference on Electronics, Communications and Control Engineering, pp. 220–225, March 2023.Best Presentation Award
  7. R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Generation Method of Error-Specific Adversarial Examples using Gradient Information for the Target Class,” Proc. of 2023 11th International Conference on Information and Education Technology, pp. 557–561, March 2023.
  8. S. Takemoto, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Machine Learning Based Power Analysis for Simon with Secure Mechanism,” Proc. of 2023 15th International Conference on Computer and Automation Engineering, pp. 26–29, March 2023.
  9. Y. Nozaki, S. Takemoto, Y. Ikezaki, and M. Yoshikawa, “Deep Learning based Side-Channel Analysis for Lightweight Cipher PRESENT,” Proc. of 2023 15th International Conference on Computer and Automation Engineering, pp. 570–574, March 2023.
  10. S. Hirukawa, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Security evaluation of Browser Red Pills on Current Internet Environment,” Proc. of the 28th International Symposium on Artificial Life and Robotics 2023, pp. 824–827, January 2023.
  11. S. Takemoto, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Power-Based Tamper Resistance Evaluation for Orthros,” Proc. of the 28th International Symposium on Artificial Life and Robotics 2023, pp. 828–831, January 2023.
2022 International Conference Publications
  1. D. Hirose, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Authenticated Encryption Based Secure In-Vehicle System Against DoS Attacks,” Proc. of IEEE 11th Global Conference on Consumer Electronics, pp. 44–45, October 2022.
  2. R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Invisible Trigger based Backdoor Attack and its Evaluation,” Proc. of 6th International Conference on Imaging, Signal Processing and Communications, pp. 1–5, July 2022.
  3. S. Takemoto, S. Miwa, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Deep Learning Power Analysis for Midori128 with Hiding Countermeasure,” Proc. of 2022 IEEE 2nd International Conference on Electronic Technology, Communication and Information, pp. 291–294, May 2022.
  4. K. Hamaguchi, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Tweakable Cryptography-based Physically Unclonable Function,” Proc. of 7th International Conference on Information and Network Technologies, pp. 42–45, May 2022.
  5. S. Takemoto, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “AI Hardware Oriented Trojan Detection Architecture,” Proc. of 5th International Conference on Electronics, Communications and Control Engineering, pp. 9–15, March 2022.
  6. D. Hirose, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Implementation and Evaluations of Midori-OTR in Automotive Systems,” Proc. of 2022 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 85–88, March 2022.
  7. R. Kumagai, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Steganography based Trojan Horse Malware,” Proc. of 2022 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 237–240, March 2022.
  8. S. Takemoto, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “High-Level Synthesis against Authenticated Lightweight Cryptography Finalists,” Proc. of 2022 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 277–280, March 2022.
  9. K. Hamaguchi, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Round Number driven Evaluation for Low-Latency Cryptography MANTIS on FPGA,” Proc. of 2022 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 281–284, March 2022.
  10. S. Miwa, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “WDDL based Countermeasure of Midori and its Implementation Evaluation,” Proc. of 2022 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 285–288, March 2022.
2015–2021 International Conference Publications
  1. Y. Nozaki and M. Yoshikawa, “Shuffling Countermeasure against Power Side-Channel Attack for MLP with Software Implementation,” Proc. of 2021 IEEE the 4th International Conference on Electronics and Communication Engineering, pp. 39–42, December 2021.
  2. Y. Nozaki and M. Yoshikawa, “Neural Network Based Glitch Physically Unclonable Function,” Proc. of 2021 IEEE 12th Annual Ubiquitous Computing, Electronics & Mobile Communication Conference, pp. 160–164, December 2021.
  3. S. Takemoto, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Hardware Trojan for Lightweight Cryptoraphy Elephant,” Proc. of IEEE 10th Global Conference on Consumer Electronics, pp. 944–945, October 2021.
  4. Y. Nozaki and M. Yoshikawa, “Performance Evaluation of AI Authentication Device Implemented on SAKURA-G,” Proc. of 7th IEEE International Conference on Applied System Innovation, pp. 75–78, September 2021.
  5. Y. Nozaki, S. Takemoto, Y. Ikezaki and M. Yoshikawa, “Performance Evaluation of Unrolled Cipher based Glitch PUF Implemented on Virtex-7,” Proc. of 2021 International Symposium on Devices, Circuits and Systems, pp. 149–152, March 2021.
  6. F. Mizutani, S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Adapting Generating Method for Imperceptibility Adversarial Examples,” Proc. of 2021 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 214–217, March 2021.
  7. S. Takemoto, F. Mizutani, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Detection Evaluation for Netlist of Secure Cryptographic Module with Malicious Circuit,” Proc. of 2021 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 218–221, March 2021.
  8. S. Takemoto, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Hardware Trojan Focusing on Plaintext in Power Analysis Attacks,” Proc. of 6th IEEE International Conference on Applied System Innovation, pp. 42–45, November 2020.
  9. Y. Nozaki, S. Takemoto, Y. Ikezaki, and M. Yoshikawa, “LUT oriented Hardware Trojan for FPGA based AI Module,” Proc. of 6th IEEE International Conference on Applied System Innovation, pp. 46–49, November 2020.
  10. F. Mizutani, Y. Nozaki, and M. Yoshikawa, “Security evaluation of timing attacks based on CNN complexity,” Proc. of 6th IEEE International Conference on Applied System Innovation, November 2020.
  11. S. Takemoto, K. Shibagaki, Y. Nozaki, and M. Yoshikawa, “Deep Learning Based Attack for AI Oriented Authentication Module,” Proc. of the 35th International Technical Conference on Circuits/Systems, Computers and Communications, pp. 5–8, July 2020.
  12. Y. Nozaki and M. Yoshikawa, “Performance Evaluation of PRINCE based Glitch PUF with Several Selection Parts,” Proc. of 7th International Conference on Artificial Intelligence and Applications, vol. 10, no. 3, pp. 29–39, March 2020.
  13. Y. Nozaki and M. Yoshikawa, “Unrolled PRINCE Cipher based Glitch Physically Unclonable Function,” Proc. of 3rd International Conference on Information Science and Systems, pp. 3–7, March 2020.
  14. K. Shibagaki, Y. Nozaki, and M. Yoshikawa, “LUT-Network based Physical Unclonable Function and its Evaluation,” Proc. of 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 531–534, March 2020.
  15. T. Umeda, Y. Nozaki, and M. Yoshikawa, “Hierarchical GA based Modeling Analysis for RO PUF,” Proc. of 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 535–538, March 2020.
  16. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “A Small Size Oriented Countermeasure against Power Analysis on Low Latency Cryptography Implementation,” Proc. of 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 590–593, March 2020.Student Paper Award
  17. K. Nishida, Y. Nozaki, R. Kurachi, S. Honda, and M. Yoshikawa, “Vulnerability Evaluation of Mobile Robot with Sensors against Malicious Attacks,” Proc. of 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 594–597, March 2020.
  18. Y. Nozaki and M. Yoshikawa, “Tamper Resistance Evaluation of MLP with Software Implementation against Power Consumption based Model Extraction,” Proc. of 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 602–605, March 2020.
  19. Y. Nozaki and M. Yoshikawa, “Tamper Resistance Evaluation of TWINE Implemented on 8-bit Microcontroller,” Proc. of the 3rd International Conference on Software Engineering and Information Management, pp. 226‒231, January 2020.
  20. S. Takemoto, K. Nishida, Y. Nozaki, M. Yoshikawa, S. Honda, and R. Kurachi, “Performance Evaluation of CAESAR Authenticated Encryption on SROS2,” Proc. of 2nd Artificial Intelligence and Cloud Computing Conference, pp. 168‒172, December 2019.
  21. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Statistical Power Analysis for IoT Device Oriented Encryption with Glitch Canceller,” Proc. of IEEE 11th International Workshop on Computational Intelligence and Applications, pp. 73–76, November 2019.
  22. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “'Evaluation of the Hiding-Countermeasure PRINCE Using Differential Power Analysis,” Proc. of IEEE 8th Global Conference on Consumer Electronics, pp. 164–165, October 2019.
  23. K. Nishida, Y. Nozaki, and M. Yoshikawa, “Security Evaluation of Counter Synchronization Method for CAN Against DoS Attack,” Proc. of IEEE 8th Global Conference on Consumer Electronics, pp. 166–167, October 2019.
  24. Y. Nozaki and M. Yoshikawa, “Quantitative Performance Evaluation of PL PUF and RO PUF with ASIC Implementation,” Proc. of IEEE 8th Global Conference on Consumer Electronics, pp. 1127–1128, October 2019.
  25. T. Umeda, Y. Nozaki, and M. Yoshikawa, “Scalability and Performance Evaluation of GA Based Modeling Analysis for RO PUF,” Proc. of IEEE 8th Global Conference on Consumer Electronics, pp. 1133–1134, October 2019.
  26. Y. Nozaki and M. Yoshikawa, “Energy Harvesting PUF oriented ID Generation Method and its Evaluation System,” Proc. of International Conference on Information Technology and Computer Communications, pp. 119‒124, August 2019.
  27. M. Yoshikawa, Y. Ikezaki, and Y. Nozaki, “Side-Channel Analysis for Searchable Encryption System and its Security Evaluation,” Proc. of 17th IEEE International Conference on Embedded and Ubiquitous Computing, pp. 465–469, August 2019.
  28. Y. Nozaki and M. Yoshikawa, “Security Evaluation of Ring Oscillator PUF against Genetic Algorithm Based Modeling Attack,” Proc. of 13th International Conference on Innovative Mobile and Internet Services in Ubiquitous Computing, vol. 994, pp. 338–347, springer, July 2019.
  29. S. Matsumi, Y. Nozaki, and M. Yoshikawa, “Linear Model Based Attack for Improved Arbiter PUF,” Proc. of 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 1–4, March 2019.
  30. T. Umeda, Y. Nozaki, and M. Yoshikawa, “Response Cloning Method using Genetic Algorithm for Ring Oscillator PUF,” Proc. of 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 5–8, March 2019.
  31. K. Shibagaki, Y. Nozaki, and M. Yoshikawa, “Area Overhead aware Neural Network Physical Unclonable Function,” Proc. of 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 9–12, March 2019.
  32. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Power Analysis Countermeasures for PRINCE and its Evaluation,” Proc. of 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 56–59, March 2019.
  33. K. Nishida, Y. Nozaki, and M. Yoshikawa, “Synchronized Authentication Method for CAN Communication,” Proc. of 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 60–63, March 2019.
  34. Y. Nozaki and M. Yoshikawa, “Performance Evaluation of Energy Harvesting PUF using Photovoltaic Generation,” Proc. of 2019 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 64–67, March 2019.
  35. Y. Nozaki and M. Yoshikawa, “Secret Sharing Schemes Based Secure Authentication for Physical Unclonable Function,” Proc. of IEEE 4th International Conference on Computer and Communication Systems, pp. 445–449, February 2019.
  36. Y. Nozaki and M. Yoshikawa, “Side-Channel Resistance Evaluation Method using Statistical Tests for Physical Unclonable Function,” Proc. of the First International Conference on AI in information and communication, pp. 189–194, February 2019.
  37. S. Matsumi, Y. Nozaki, and M. Yoshikawa, “Feature Extraction Driven Modeling Attack Against Double Arbiter PUF and Its Evaluation,” Proc. of Artificial Intelligence and Cloud Computing Conference, pp. 94–99, December 2018.
  38. Y. Nozaki and M. Yoshikawa, “Security Evaluation of a Lightweight Cipher SPECK against Round Addition DFA,” Proc. of Artificial Intelligence and Cloud Computing Conference, pp. 100–105, December 2018.
  39. Y. Nozaki and M. Yoshikawa, “Countermeasure of Lightweight Physical Unclonable Function against Side-Channel Attack,” Proc. of 2019 Cybersecurity and Cyberforensics Conference, pp. 30‒34, May 2019.
  40. Y. Nozaki and M. Yoshikawa, “Evaluation of Energy Harvesting Technique for Security Module,” IOP Conference Series: Materials Science and Engineering, vol. 575, no. 012008, pp. 1‒9, August 2019.
  41. K. Nishida, Y. Nozaki, and M. Yoshikawa, “Vulnerability Verification for Illegal Attack on Secure CAN Communication,” IOP Conference Series: Materials Science and Engineering, vol. 575, no. 012012, pp. 1‒7, August 2019.Best Presentation Award
  42. S. Takemoto, Y. Nozaki, and M. Yoshikawa, “Differential Power Analysis using Chosen-plaintext for Unrolled PRINCE,” Proc. of 2018 International Conference on Robotics, Control and Automation Engineering, pp. 152‒155, December 2018.
  43. M. Yoshikawa, Y. Ikezaki, and Y. Nozaki, “Implementation of Searchable Encryption System with Dedicated Hardware and its Evaluation,” Proc. of 9th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference, pp. 218–221, November 2018.
  44. Y. Nozaki and M. Yoshikawa, “Shuffling Based Side-Channel Countermeasure for Energy Harvester,” Proc. of IEEE 7th Global Conference on Consumer Electronics, pp. 679–680, October 2018.
  45. K. Shibagaki, T. Umeda, Y. Nozaki, and M. Yoshikawa, “Feasibility Evaluation of Neural Network Physical Unclonable Function,” Proc. of IEEE 7th Global Conference on Consumer Electronics, pp. 677–678, October 2018.
  46. T. Umeda, K. Shibagaki, Y. Nozaki, and M. Yoshikawa, “Lethal Genes Aware Genetic Programming Analysis for RO PUF,” Proc. of IEEE 7th Global Conference on Consumer Electronics, pp. 723–724, October 2018.
  47. M. Yoshikawa and Y. Nozaki, “Lightweight Cipher Aware Countermeasure Using Random Number Masks and Its Evaluation,” Proc. of 2nd International Conference on Vision, Image and Signal Processing, no. 5, pp. 1–5, August 2018. Best Paper Award
  48. Y. Nozaki and M. Yoshikawa, “Tamper Resistance Evaluation Method for Energy Harvester,” Proc. of 3rd IEEE International Conference on Computational Intelligence and Applications, pp. 200–204, July 2018.
  49. Y. Nozaki and M. Yoshikawa, “Area Constraint aware Physical Unclonable Function for Intelligence Module,” Proc. of 3rd IEEE International Conference on Computational Intelligence and Applications, pp. 205–209, July 2018.
  50. T. Umeda, Y. Nozaki, and M. Yoshikawa, “Dynamic Adaptive Mutation Based Genetic Programming for Ring Oscillator PUF,” Proc. of 3rd IEEE International Conference on Computational Intelligence and Applications, pp. 210–213, July 2018.
  51. Y. Nozaki and M. Yoshikawa, “Physical Unclonable Function using Energy Harvesting,” Proc. of 2018 IEEE International Meeting for Future of Electron Devices, Kansai, pp. 38–39, June 2018.
  52. K. Shibagaki, Y. Nozaki, and M. Yoshikawa, “Tamper Resistance Evaluation of Noise based Countermeasure for IoT Devices,” Proc. of 2018 IEEE International Meeting for Future of Electron Devices, Kansai, pp. 36–37, June 2018.
  53. Y. Nozaki and M. Yoshikawa, “Power Consumption Aware Machine Learning Attack for Feed-Forward Arbiter PUF,” In: Lee R. (eds) Computer and Information Science, Studies in Computational Intelligence, vol. 791, pp. 49–62, Springer, September 2018.
  54. Y. Nozaki and M. Yoshikawa, “Round Processing Aware Tamper Resistance Architecture for Standard Encryption PRESENT,” Proc. of 4th IEEE International Conference on Applied System Innovation, pp. 1178–1181, April 2018.
  55. Y. Nozaki and M. Yoshikawa, “Power Analysis Method for a Lightweight Cipher Midori,” Proc. of 21st Workshop on Synthesis And System Integration of Mixed Information technology, R4-8, pp. 331–336, March 2018.
  56. Y. Nozaki and M. Yoshikawa, “Genetic Programming Based Attack for RO PUF,” Proc. of 2018 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 447–450, March 2018.
  57. H. Nagata, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Physical Unclonable Function Using Neural Network,” Proc. of 2018 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 451–454, March 2018.
  58. K. Shibagaki, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Evaluation of Masked based Countermeasure using Random Number Tests,” Proc. of 2018 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 455–458, March 2018.
  59. T. Umeda, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Fault generation technique of hardware security module,” Proc. of 2018 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 459–462, March 2018. Student Paper Award
  60. Y. Nozaki and M. Yoshikawa, “EM Based Machine Learning Attack for XOR Arbiter PUF,” Proc. of the 2nd International Conference on Machine Learning and Soft Computing, pp. 19–23, February 2018. Best Presentation Award
  61. M. Yoshikawa and Y. Nozaki, “Helper Data Aware Cloning Method for Physical Unclonable Function,” Proc. of 2nd IEEE International Conference on Smart Cloud, pp. 47–51, November 2017.
  62. M. Yoshikawa and Y. Nozaki, “Electromagnetic Analysis Method for Ultra Low Power Cipher Midori,” Proc. of 8th IEEE Annual Ubiquitous Computing, Electronics & Mobile Communication Conference, pp. 70–75, October 2017.
  63. Y. Ikezaki, Y. Nozaki, H. Nagata, and M. Yoshikawa, “FPGA Implementation Technique for Power Consumption Aware Tamper Resistance Accelerator of Lightweight PUF,” Proc. of IEEE 6th Global Conference on Consumer Electronics, pp. 588–589, October 2017.
  64. Y. Nozaki, Y. Ikezaki, H. Nagata, and M. Yoshikawa, “Power Analysis for a Lightweight Authenticated Encryption SIMON-JAMBU,” Proc. of IEEE 6th Global Conference on Consumer Electronics, pp. 590–591, October 2017.
  65. Y. Nozaki and M. Yoshikawa, “Power Analysis Attack for an Authenticated Encryption Offset Two Round,” Proc. of 7th Annual IEEE International Conference on CYBER Technology in Automation, Control, and Intelligent Systems, pp. 521–526, August 2017. IEEE Nagoya Section Conference Presentation Award
  66. Y. Nozaki and M. Yoshikawa, “Statistical Fault Analysis for a Lightweight Cipher Midori,” Proc. of 14th IEEE International Conference on Information and Automation, pp. 236–241, July 2017.
  67. Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Evaluation platform for the security of in-vehicle systems,” Proc. of 2017 IEEE International Meeting for Future of Electron Devices, Kansai, pp. 44–45, June 2017.
  68. Y. Nozaki, Y. Ikezaki, and M. Yoshikawa, “Evaluation of PLFSR PUF with Several Implementation Methods for FPGA,” Proc. of 2017 IEEE International Meeting for Future of Electron Devices, Kansai, pp. 46–47, June 2017.
  69. Y. Nozaki and M. Yoshikawa, “Power Analysis Attack for a Fast Authenticated Encryption MORUS,” Proc. of 3rd IEEE International Conference on Applied System Innovation, pp. 365–368, May 2017.IEEE ICASI 2017 First Prize Paper Award
  70. Y. Nozaki and M. Yoshikawa, “Tamper Resistance Evaluation of PUF Implementation against Machine Learning Attack,” Proc. of 2017 International Conference on Biometrics Engineering and Application, pp. 31–36, April 2017.
  71. Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Hierarchical Deep Learning Attack for Authenticated Devices,” Proc. of 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 49–52, March 2017.
  72. H. Nagata, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Hardware Trojan Detection Method based on Deep Learning,” Proc. of 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing , pp. 53–56, March 2017.
  73. Y. Nozaki, Y. Ikezaki, and M. Yoshikawa, “Two Stages Electromagnetic Analysis for an Authenticated Encryption,” Proc. of 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 189–192, March 2017.
  74. T. Sato, Y. Nozaki, Y. Ikezaki, and M. Yoshikawa, “Secure In-vehicle System Using Authenticated Encryption SPECK-OTR,” Proc. of 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 241–244, March 2017.
  75. T. Iwase, Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Trojan for In-Vehicle System with Sensor Trigger and its Evaluation System,” Proc. of 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 245–248, March 2017.
  76. M. Yoshikawa and Y. Nozaki, “Hierarchical power analysis attack for falsification detection cipher,” Proc. of 7th IEEE Annual Computing and Communication Workshop and Conference, pp. 1–6, January 2017.
  77. M. Yoshikawa and Y. Nozaki, “Tamper resistance evaluation of PUF in environmental variations,” Proc. of 2016 IEEE Electrical Design of Advanced Packaging and Systems, pp. 119–121, December 2016.
  78. M. Yoshikawa and Y. Nozaki, “Two Stage Fault Analysis against a Falsification Detection Cipher Minalpher,” Proc. of 2016 IEEE International Conference on Smart Cloud, pp. 79–84, November 2016.
  79. Y. Nozaki, Y. Ikezaki, and M. Yoshikawa, “Electromagnetic Analysis for a Lightweight Block Cipher Simon,” Proc. of 20th Workshop on Synthesis And System Integration of Mixed Information technology, R4-22，pp. 391–396, October 2016
  80. Y. Nozaki, Y. Ikezaki, and M. Yoshikawa, “Hardware Trojan for an Authenticated Encryption Minalpher,” Proc. of IEEE 5th Global Conference on Consumer Electronics, pp. 455–456, October 2016.IEEE GCCE 2016 Outstanding Poster Award
  81. Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Deep Learning Attack for Physical Unclonable Function,” Proc. of IEEE 5th Global Conference on Consumer Electronics, pp.457–458, October 2016.
  82. Y. Nozaki, T. Iwase, Y. Ikezaki, and M. Yoshikawa, “Electromagnetic Analysis for PRESENT and its Evaluation with Several Selection Functions,” Proc. of International Conference on Electrical Engineering, 90144, pp. 1–4, July 2016.
  83. Y. Ikezaki, Y. Nozaki, T. Iwase, and M. Yoshikawa, “Power Analysis Attack Method for a Back-check System,” Proc. of International Conference on Electrical Engineering, 90458, pp. 1–4, July 2016.
  84. Y. Nozaki, Y. Ikezaki, and M. Yoshikawa, “Tamper Resistance of IoT Devices against Electromagnetic Analysis,” Proc. of 2016 IEEE International Meeting for Future of Electron Devices, Kansai, pp. 82–83, June 2016.
  85. Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “IoT Device Oriented Security Module using PUF,” Proc. of 2016 IEEE International Meeting for Future of Electron Devices, Kansai, pp. 84–85, June 2016.
  86. M. Yoshikawa and Y. Nozaki, “Electromagnetic Analysis Attack for a lightweight cipher PRINCE,” Proc. of 4th International Conference on Cybercrime and Computer Forensics, pp. 1–6, June 2016.
  87. Y. Nozaki, K. Nohara, Y. Ikezaki, and M. Yoshikawa, “Fault Analysis for Piccolo-OTR,” Proc. of 2nd IEEE International Conference on Applied System Innovation, no. 408, pp. 1–4, May 2016. IEEE ICASI 2016 First Prize Paper Award
  88. Y. Ikezaki, Y. Nozaki, and M. Yoshikawa, “Noise Evaluation of Physical Unclonable Function for Security Module,” Proc. of 2nd IEEE International Conference on Applied System Innovation, no. 409, pp. 1–4, May 2016.IEEE ICASI 2016 Best Conference Paper Award
  89. M. Yoshikawa and Y. Nozaki, “Power analysis attack and its countermeasure for a lightweight block cipher Simon,” Proc. of 17th International Conference on Information Technology-New Generation, vol. 448, pp. 151–160, Springer, April 2016.
  90. M. Yoshikawa, Y. Nozaki, and K. Asahi, “Vulnerability evaluation accelerator for lightweight ciphers,” Proc. of IEEE International Conference on Intelligent Data and Security, pp. 377–381, April 2016.
  91. M. Yoshikawa, Y. Nozaki, and K. Asahi, “Multiple Rounds Aware Power Analysis Attack for a Lightweight Cipher SIMECK,” Proc. of 2016 IEEE 2nd International Conference on Big Data Computing Service and Applications, pp. 252–256, March 2016.
  92. M. Yoshikawa, Y. Nozaki, and K. Asahi, “Electromagnetic Analysis Attack for a Lightweight Block Cipher TWINE,” Proc. of IEEE/ACES International Conference on Wireless Information Technology and Systems and Applied Computational Electromagnetics, pp. 1–2, March 2016.
  93. Y. Nozaki, R. Matsuhisa, K. Nohara, K. Asahi, and M. Yoshikawa, “Electromagnetic Analysis for a Lightweight Block Cipher PRESENT in Frequency Domain,” Proc. of 2016 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 271–274, March 2016.Student Paper Award
  94. R. Matsuhisa, Y. Nozaki, K. Nohara, K. Asahi, and M. Yoshikawa, “Verification of Tamper Resistance for Cryptographic Circuit using a Random Number Masking,” Proc. of 2016 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 275–278, March 2016.
  95. K. Nohara, R. Matsuhisa, Y. Nozaki, K. Asahi, and M. Yoshikawa, “Fault Injection Attack for Authenticated Encryption AES-OTR,” Proc. of 2016 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 283–286, March 2016.
  96. Y. Nozaki, K. Asahi, and M. Yoshikawa, “Statistical Fault Analysis for a Lightweight Block Cipher TWINE,” Proc. of IEEE 4th Global Conference on Consumer Electronics, pp. 497–498, October 2015.IEEE GCCE 2015 2nd Prize Excellent Poster Award
  97. K. Nohara, Y. Nozaki, and M. Yoshikawa, “Hardware Trojan for Ultra Lightweight Block Cipher Piccolo,” Proc. of IEEE 4th Global Conference on Consumer Electronics, pp. 201–202, October 2015.
  98. T. Iwase, Y. Nozaki, T. Kumaki, and M. Yoshikawa, “Detection Technique for Hardware Trojans Using Machine Learning in Frequency Domain,” Proc. of IEEE 4th Global Conference on Consumer Electronics, pp. 184–185, October 2015.
  99. M. Yoshikawa, R. Matsuhisa, T. Miyamoto, Y. Nozaki, and K. Asahi, “Hamming Distance aware Fault Analysis Attack for a lightweight block cipher PRESENT,” Proc. of International Sciences and Technology Research Conference, pp. 51–58, September 2015.
  100. M. Yoshikawa, Y. Nozaki, T. Asai, and K. Asahi, “Frequency Domain aware Power Analysis Attack against Random Clock LSI for Secure Automotive Embedded Systems,” Proc. of IEEE 82nd Vehicular Technology Conference, 4P-12, pp. 1–5, September 2015.
  101. M. Yoshikawa, Y. Hayashi, Y. Nozaki, and K. Asahi, “Secure automotive embedded system using a lightweight block cipher against malicious Trojan attack,” Proc. of 21st ISSAT International Conference on Reliability and Quality in Design, pp. 218–221, August 2015.
  102. Y. Nozaki, K. Asahi, and M. Yoshikawa, “Correlation Power Analysis Method for a Lightweight Block Cipher Simon,” Proc. of Taiwan and Japan Conference on Circuits and Systems, p. 22, August 2015.
  103. K. Nohara, R. Matsuhisa, Y. Nozaki, K. Asahi, and M. Yoshikawa, “Zero-Value Power Analysis Attack for PRESENT,” Proc. of International Conference on Electrical Engineering, A9, ICEE15A-146, pp. 1–4, July 2015.
  104. R. Matsuhisa, Y. Nozaki, K. Nohara, K. Asahi, and M. Yoshikawa, “A Hardware Trojan Architecture for Elliptic Curve Cryptography,” Proc. of International Conference on Electrical Engineering, A9, ICEE15A-167, pp. 1–4, July 2015.
  105. Y. Nozaki, R. Matsuhisa, K. Nohara, K. Asahi, and M. Yoshikawa, “Power Analysis Attack for TWINE in Frequency Domain and its Evaluation,” Proc. of International Conference on Electrical Engineering, A9, ICEE15A-168, pp. 1–4, July 2015.
  106. M. Yoshikawa, K. Sugioka, Y. Nozaki, and K. Asahi, “Secure in-vehicle systems against Trojan attacks,” Proc. of 14th IEEE/ACIS International Conference on Computer and Information Science, pp. 29–34, June 2015.
  107. Y. Nozaki, T. Asai, K. Asahi, and M. Yoshikawa, “Power Analysis for Clock Fluctuation LSI,” Proc. of 16th IEEE/ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, pp. 167–170, June 2015.
  108. Y. Nozaki, K. Asahi, and M. Yoshikawa, “Countermeasure of TWINE against Power Analysis Attack,” Proc. of 2015 IEEE International Meeting for Future of Electron Devices, Kansai, pp. 68–69, June 2015.
  109. M. Yoshikawa, T. Asai, R. Matsuhisa, Y. Nozaki, and K. Asahi, “Tamper Resistance Evaluation Tests with Noise Resources,” Proc. of 17th International Conference on Materials Science, Engineering and Manufacturing, pp. 1584–1588, March 2015.
  110. M. Yoshikawa, T. Asai, Y. Nozaki, R. Matsuhisa, and K. Asahi, “Method of Estimating Side-Channel Waveforms Using Profiling,” Proc. of 30th International Conference on Computers and Their Applications, pp. 57–62, March 2015.

Members

Our laboratories consist of multiple faculty members and students working on AI security, privacy-preserving learning, cryptography, and hardware security.

Faculty Members

Faculty of Information Engineering, Meijo University

Professor: Masaya YOSHIKAWA

Associate Professor: Yusuke NOZAKI

Assistant Professor: Shu TAKEMOTO

Graduate Students

Doctoral and master's students conduct research toward international publication and real-world deployment. Students regularly present their work at domestic and international conferences and publish papers in peer-reviewed academic journals.

Undergraduate Students

Undergraduate students participate in research projects and develop fundamental skills for advanced study.

Prospective Students

We welcome motivated applicants for the following graduate programs who wish to contribute to the development of secure and trustworthy AI technologies for society.

We are currently recruiting students for the Master’s Program and Doctoral Program.

Prospective graduate students who are interested in AI security, trustworthy AI, privacy-preserving machine learning, hardware security, and cryptographic implementation are encouraged to contact us through the official inquiry form. Our laboratories encourage students to publish papers in international conferences and journals.

International Students

We welcome international students who are interested in conducting research in AI security and related fields.

Master's students are required to complete graduate-level coursework in addition to their research activities. Courses offered in the graduate program can be taken in English, enabling international students to pursue their studies and research effectively.

Students from Other Universities

We actively welcome applicants from other universities, departments, and academic backgrounds.

  • Computer Science
  • Information Engineering
  • Electrical and Electronic Engineering
  • Data Science and Mathematics
  • Communication Engineering and Applied Physics

These examples are representative backgrounds, but applicants are not limited to these fields. Students from diverse academic disciplines are encouraged to apply.

Working Professionals

We welcome working professionals who wish to pursue a master's or doctoral degree while continuing their careers.

Research plans and meetings can be arranged flexibly according to each student’s working schedule.

Contact

For laboratory visits, admission inquiries, research collaboration, and media inquiries, please use the inquiry form.

To reduce automated email address collection and spam, direct email addresses are not displayed on this website.

Inquiry Form

Open Inquiry Form