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Research Area

Deep-Learning-Based Side-Channel Analysis

We develop deep-learning power-analysis methods for evaluating the tamper resistance of lightweight cryptographic circuits implemented on FPGA devices.

Overview

Deep-learning-based power analysis has recently emerged as an efficient approach to side-channel analysis. Compared with conventional power analysis, deep learning can reduce the time and effort required by an attacker, making renewed tamper-resistance evaluation of existing secure circuits increasingly important.

Our research targets secure hardware implementations of the lightweight block ciphers PRINCE and Midori. We investigate both loop-architecture and unrolled-architecture implementations and evaluate their resistance using power traces collected from cryptographic circuits implemented on Field Programmable Gate Arrays (FPGAs).

Research Goal

To establish a practical deep-learning power-analysis framework for lightweight block ciphers and clarify whether masking-based secure circuits remain vulnerable under realistic FPGA measurements.

Proposed MethodProfiling PhaseAnalysis PhaseEvaluationResults
Proposed Method

Two-Phase Deep-Learning Power Analysis

The proposed method consists of two stages: (A) a profiling phase and (B) an analysis phase. During profiling, the attacker uses a device with known internal values to learn the relationship between measured power traces and data-dependent leakage. During analysis, the trained model is applied to traces from a target device containing an unknown fixed secret key.

Overview of the proposed two-phase deep-learning power-analysis method
Figure 1. Overview of the proposed deep-learning power-analysis method.

(A) Profiling Phase

The attacker first prepares a cryptographic device whose plaintexts, ciphertexts, and secret key are known. Power traces are used as training inputs, while Hamming-distance values calculated from known internal transitions are used as labels. The exact calculation of these labels depends on the attack scenario.

Class-Imbalance Handling with SMOTE

Because the Hamming-distance labels follow a binomial distribution, the resulting classes are imbalanced. Direct training can therefore reduce classification performance. To address this issue, the Synthetic Minority Over-sampling Technique (SMOTE) is applied to Hamming-distance classes 0 through 4 until each class contains the same number of samples as the largest class.

Point-of-Interest Selection

The Point of Interest (POI) in each power trace is selected around the input-side round function, following conventional analysis strategies for low-latency cryptographic implementations. Restricting the trace window reduces irrelevant information and helps the neural network learn leakage related to key-dependent operations.

(B) Analysis Phase

Power traces collected from a target device with an unknown fixed secret key are input to the trained model. The model predicts Hamming-distance values, which are combined with known plaintext values to estimate candidate subkeys.

The key-recovery rule depends on the attack scenario. For each subkey, candidate values are accumulated across traces, and the candidate with the largest occurrence frequency or weight is selected as the estimated correct subkey.

Known Device

Used during profiling to learn the relationship between leakage traces and Hamming-distance labels.

Unknown Target

Produces attack traces from a device containing a fixed but unknown secret key.

Weighted Key Guessing

Predicted leakage classes are converted into candidate subkeys and aggregated across multiple traces.

Experimental Evaluation

The proposed method was evaluated against PRINCE and Midori128 and compared with conventional Correlation Power Analysis (CPA).

Profiling Conditions

Key-Recovery Targets

PRINCE is analyzed as sixteen 4-bit subkeys, while Midori128 is analyzed as thirty-two 4-bit subkeys. For CPA, all measured traces—100,000 or 400,000 depending on the scenario—are used to calculate correlation coefficients and estimate the secret key.

Both PRINCE and Midori128 are evaluated using masking-protected loop-architecture implementations under a known-ciphertext attack scenario.

Experimental setup
Figure 2. Experimental setup for FPGA-based power measurement.
Experimental setup
Figure 3. Key-recovery results for conventional and proposed methods.

Experimental Results

The first-order conventional method (Conv) recovered at most four subkeys—12.5% or less—even when 40,000 traces were used. When all 400,000 measured traces were analyzed, only one subkey was recovered, indicating that conventional first-order analysis has difficulty attacking masking-protected secure circuits.

In contrast, the proposed deep-learning method (Prop) successfully recovered all subkeys of both PRINCE and Midori128 using only 1,000 traces.

PRINCE

All sixteen 4-bit subkeys were successfully recovered with 1,000 traces.

Midori128

All thirty-two 4-bit subkeys were successfully recovered with 1,000 traces.

Security Implication

Masking alone may not provide sufficient protection against profiled deep-learning attacks.

Key Finding

The proposed method dramatically reduces the number of traces required for complete key recovery and demonstrates the need for new countermeasures against deep-learning-based side-channel analysis.

Significance and Future Work

The results show that secure lightweight-cipher implementations that resist conventional first-order CPA can still be vulnerable to profiled deep-learning attacks. Future work includes evaluating unrolled architectures, testing additional masking and hiding countermeasures, improving cross-device generalization, and developing hardware designs that suppress exploitable leakage.

Keywords

Side-Channel AnalysisPower AnalysisDeep LearningPRINCEMidori128FPGASMOTEMaskingTamper Resistance

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